How to make sure the 2-stage opamp is stable? How does the compensation work?
Analog Ic Design Engineer Interview Questions
94 analog ic design engineer interview questions shared by candidates
Psrr how do you reduce for a diff amp with active load pmos
Draw and explain a high side current sense circuit.
They asked me to draw a bandgap, PLL, sigma delta adc
draw a basic boost regulator circuit
RLC circuit: what is the DC resistance. What is the effective L at 1kHz ? What is the effective C at 1 kHz ?
Does the MOS have resistance when it has been turn on?
It seems they open one of Razavi's electronics 1 lectures on youtube randomly, and copy one of his quizzes. Trick questions and hand-solving differential equations are also covered
Do a detail DC sweep of a n-channel MOSFET and Graph.
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