Was asked about questions related to my projects. And topics related to timing analysis, digital electronics, computer architecture etc.
Soc Design Engineer Interview Questions
104 soc design engineer interview questions shared by candidates
How would you verify a Verilog design?
1. What motivates and frustrates you? 2. Many coding questions
Describe logic gates AND, OR, XOR
1. what are inertial delay and transport delay? 2. Circuit using D latch, master slave FF & explain it 3. how u will reduce the input frequency? draw the circuit & explain 4. D FF Verilog code
How to swap two registers in verilog without using third register?
Different multiplexer and demultiplexer and describe the function application.
Describe what is PCIe and the protocol.
How many type of multiplexer and what is the application. Explain how 2 to 1 multiplexer with 9 input.
You have a device A connected through 8 channels that can transmit binary signals (1 bit per channel) at a rate of 200 MHz to a device B which you have to design, and which then has to transmit through a single channel of 1 Gb/s to a device C. What can you say about this network. What do you have to look out for?
Viewing 1 - 10 interview questions
See Interview Questions for Similar Jobs
Soc Physical Design EngineerAsic EngineerVlsi EngineerHardware Asic Design EngineerAsic Design Verification EngineerAsic Physical Design EngineerVlsi Design EngineerElectrical Hdwr Engineer IFpga Design EngineerAsic Design EngineerFirmware EngineerAsic Verification EngineerVlsi Cad Tool Support EngineerPhysical Design EngineerCpu Design EngineerFpga Hardware Design EngineerFpga EngineerSenior Vlsi Design Engineer